(1) Field of Invention
The present invention relates to a pulse width modulation control circuit, and more particularly, to a pulse width modulation control circuit for stable synchronization throughout a wide range of frequencies.
(2) Description of the Prior Art
A display device using a cathode-ray tube, such as a television, or a monitor, has two synchronizing circuits, typically a vertical deflection circuit and horizontal deflection circuit. Since a horizontal deflection circuit is a high-frequency circuit, operating at a frequency typically beyond tens of kilohertzes, if the circuit causes interference related to a switching frequency of a switching mode power supply (SMPS), there is noise on the screen.
However, such interference can be minimized by synchronization. That is, a synchronization means operates the switching mode power supply according to the frequency of the horizontal deflection circuit.
The horizontal deflection frequency is fixed in the display device of a television set, whereas, in a monitor, the horizontal deflection frequency varies by a factor of two or three times, according to which one of various display methods is used.
As related technologies, "Regulating pulse width modulation" is described in `Data book` manufactured by Unitrode corporation, pp. 54-59, 1993-1994; and, "Practical considerations in current mode power supplies--III synchronization" is described in `Application note` manufactured by Unitrode Corporation, pp. 139-144, 1993-1994.
In the drawings hereof:
FIG. 1 shows a conventional pulse width modulation control circuit; and
FIGS. 2A, 2B, and 2C show voltage variation according to a synchronizing signal in the conventional pulse width modulation control circuit using a sawtooth wave.
As shown in FIG. 1, the conventional pulse width modulation control circuit includes a sawtooth oscillator for generating a sawtooth voltage after receiving the synchronizing signal, that is, a synchronizing frequency; a sawtooth generating means 11 including a capacitor; an error amplifier 12; and a comparator 13 for outputting a pulse width modulating signal after receiving the output signals of both the sawtooth oscillator 11 and the error amplifier 12.
As the frequency applied to the conventional pulse width modulation control circuit increases, voltage amplitudes .DELTA.V2 and .DELTA.V3 determining a pulse width decrease inversely proportionals to the frequency value, as shown in FIGS. 2B and 2C. Accordingly, when the voltage amplitudes .DELTA.V2 and .DELTA.V3 vary, the conventional pulse width modulation circuit varies the gain of system transfer function in proportion to the .DELTA.V2 and the .DELTA.V3. Therefore, it is difficult to achieve system optimization, and the pulse width is sensitive to noise as much as a lowered voltage amplitude.